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Important: This document is part of the Legacy section of the ADC Reference Library. This information should not be used for new development.
Current information on this Reference Library topic can be found here:
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Q: I am writing a device driver as well as diagnostic software for our new PCI card, which is capable of receiving PCI burst transfers (it is not a bus master). How does one explicitly force PCI burst transfers? Is this done automatically
when one calls A: Within the System's address space, main memory defaults to write back cache
mode while PCI memory space defaults to cache inhibit mode. To enable the
PowerPC to burst to areas of PCI memory space, the particular area must be set
to a cacheable setting. However, extreme care must be taken to perform
appropriate cache flushing when operating on cacheable PCI memory space.
Drivers that control PCI masters may wish to experiment with different cache
modes for their particular DMA buffer spaces to determine optimal settings.
There is a BlockCopy in the DSL uses For more information, refer to Designing PCI Cards and Drivers |
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