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Leopard Reference Library: Performance
Current Intel and PowerPC processors include 128-bit vector engines to perform single-instruction multiple-data (SIMD) operations. These vector engines offer tremendous speed advantages, especially for highly parallel operations such as processing audio, graphics, or video. Developers can use these vector engines directly or take advantage of the functionality offered by the Accelerate framework.

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Taking Advantage of the Accelerate Framework (HTML)
Learn how your application can run on PowerPC- or Intel-based Macs without processor-specific customization.
Articles 2005-10-03
Optimizing for the Power Mac G5 (HTML)
Learn how to optimize your code for the Power Mac G5.
Articles 2003-10-24
AltiVec/SSE Migration Guide (HTML) (PDF)
Explains how to convert PowerPC AltiVec code to Intel SSE code.
Guides 2005-09-08
vDSP Single-Vector Operations Reference (HTML) (PDF)
This document describes the C API for performing common routines on a single vector in vDSP.
Reference 2009-01-07
vDSP Correlation, Convolution, and Filtering Reference (HTML) (PDF)
Describes an interface for performing correlation, convolution, and filtering operations on real or complex signals.
Reference 2009-01-06
vDSP Matrix Operations Reference (HTML) (PDF)
Describes an interface for matrix arithmetic operations.
Reference 2009-01-06
vDSP One-Dimensional Fast Fourier Transforms Reference (HTML) (PDF)
Describes an interface for performing one-dimensional fast Fourier transforms on an input signal.
Reference 2009-01-06
vDSP Vector-To-Scalar Operations Reference (HTML) (PDF)
Describes functions that receive a vector as input and compute scalars as output.
Reference 2009-01-06
vDSP Vector-to-Vector Arithmetic Operations Reference (HTML) (PDF)
Describes functions that receive a vector as input and return a vector as output.
Reference 2009-01-06
vecLib Framework Reference (HTML) (PDF)
Describes the C API for vector mathematical functions in the vecLib subframework of the Accelerate framework.
Reference 2009-01-06
vDSP Two-Dimensional Fast Fourier Transforms Reference (HTML) (PDF)
Improved function discussions and corrections.
Reference 2008-11-19
vDSP Reference Collection (HTML) (PDF)
Describes the vDSP programming interface defined in the Accelerate framework for digital signal processing.
Reference 2008-10-15
vImage Reference Collection (HTML) (PDF)
Describes the C programming interface for high-performance image processing.
Reference 2007-07-12
vDSP Complex Vector Conversion Reference (HTML) (PDF)
Describes functions that convert complex vectors between interleaved and split forms.
Reference 2007-06-15
vDSP Vector Scalar Arithmetic Operations Reference (HTML) (PDF)
Describes vDSP functions that perform arithmetic operations combining a scalar with each element of a vector.
Reference 2007-06-15
Accelerate Release Notes (HTML)
Release Notes 2007-10-31
Accelerate Reference Update (HTML) (PDF)
Summarizes the symbols added to the Accelerate framework.
Release Notes 2007-07-18
vecLib Reference Update (HTML) (PDF)
Summarizes the symbols added to the vecLib framework.
Release Notes 2005-06-04
SIMD Primer (HTML) (DMG) (ZIP)
Introduction to using SIMD/SSE
Sample Code 2008-06-06
vDSP Examples (HTML) (DMG) (ZIP)
vDSP sample code
Sample Code 2007-05-10
Test64BitMultiprec (HTML) (DMG) (ZIP)
Implements (PPC) A*Y+B where A & B are arrays of 64-bit words and Y is a 64-bit integer
Sample Code 2006-06-09
dist_fft (HTML) (DMG) (ZIP)
Gigaelement FFTs on Apple G5 clusters
Sample Code 2004-08-23
VelEng FFT (HTML) (DMG) (ZIP)
G4 Velocity Engine implementation of Fast Fourier Transform (FFT) and associated convolution/correlation routines.
Sample Code 2003-01-14
VelEng Multiprecision (HTML) (DMG) (ZIP)
An implementation of arbitrary precision arithmetic using the PowerPC Velocity-Engine (G4) vector instructions.
Sample Code 2003-01-14
VelEng Wavelet (HTML) (DMG) (ZIP)
This demonstrates a Velocity Engine (G4) implementation of wavelet processing of color images
Sample Code 2003-01-14
Disabling Processor Cores on a Multi-Core System (HTML) (日本語 HTML)
QA1141: Describes how to disable processor cores on a multi-core system for testing purposes.
Technical Q&As 2008-09-16