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This Technical Note discusses composite SIMMs and why they shouldn't be used on
Macintosh computers.
[Jan 01 1993]
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Introduction
It is possible to create a large memory SIMM by using banks of many smaller
DRAM chips along with additional circuitry to fool the Macintosh memory
controller circuitry. Such a SIMM is called a composite SIMM.
The problem is that composite SIMMs can cause random memory failures due to
higher electrical currents, a higher amount of system noise, and the added
timing overhead (delay) caused by the additional circuitry.
The memory timing on Macintosh CPUs is often carefully adjusted to get the
maximum performance from the DRAMs. There is little or no margin for extra
loads on the address and control lines. There are a number of issues with
composite SIMMs, including increased loading on all lines (including the data
bus), timing specification violations, and possible physical problems.
Apple has identified a couple of problems with using composite SIMMs on
selected Macintosh computer models. Due to the nature of these problems, Apple
does not recommend the use of composite SIMMs in any Macintosh computer.
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Definition
A composite SIMM is defined as a SIMM made up of banks of many smaller DRAM
devices, with additional bank-controlling circuitry and perhaps buffers for the
address and control signals. A noncomposite SIMM, on the other hand, is
organized as a single bank of devices. As an example, a 16 MB composite SIMM
would be made up of thirty-two 4-megabit DRAM chips, along with the additional
circuitry to control the banks. Conversely, a noncomposite 16 MB SIMM would be
made up of eight 16-megabit chips only. Composite SIMMs are made up of more
commonly available and less expensive parts, hence the attraction.
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Problems
Composite SIMMs pose timing and electrical problems in some Macintosh
computers, particularly those optimized for maximum DRAM performance, such as
the Macintosh Centris 610, Macintosh Centris 650, Macintosh Quadra 800, and the
Macintosh Quadra 900 series.
Composite SIMMs have a larger number of DRAM devices than the SIMMs Apple has
tested with. The extra components result in larger peak currents to the devices
during read/write accesses and refresh. These larger peak currents subsequently
result in added stress to the power system and an overall increase in system
noise. The increase in system noise has caused problems on some systems such as
the Macintosh Quadra 900 and Macintosh Quadra 950.
The additional circuitry added to composite SIMMs appears to add a slight
amount of overhead to the timing of memory accesses. The Macintosh Quadra 800
has very strict timing guidelines (it requires 60-nanosecond DRAM), and is
particularly sensitive to this potential problem. These problems may not occur
until additional SIMMs are added (for example, two composite SIMMs may work,
but four composite SIMMs may cause random failures or the system may not boot).
In addition, the larger physical dimensions of the composite SIMMs may make
proper installation difficult or impossible.
Back to top May Work Under Some Conditions, But...
Composite SIMMs may work under some conditions, but users may experience random
failures such as startup failures, system errors, or other strange crashes. The
errors can vary with different SIMMs, SIMM configurations, and vendors.
In addition, process variations in chips used in various Macintosh computers
(such as memory controllers) can mean one CPU might act a little differently
than the same model manufactured at a different time. It's even possible to see
minute variations caused by temperature and supply voltages.
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Conclusion
Apple does not support composite SIMMs, nor does it guarantee that they will
work in any Macintosh, due to the electrical and timing problems identified
with selected Macintosh computers. Apple recommends the use of noncomposite
SIMMs because they are less likely to have problems similar to those described
in this Technical Note. While presently expensive, it is expected that the cost
of 16-megabit chip SIMMs will come down.
Back to top References
Developer Notes for individual Macintosh CPU models
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