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The display subsystem consists of a graphics controller ASIC and 8 MB of SDRAM on the main logic board. The graphics controller IC is an ATI RAGE 128 VR. It contains 2D and 3D acceleration engines, front-end and back-end scalers, a CRT controller, and an AGP bus interface with bus master capability.
The interface between the graphics IC and the rest of the system is an AGP (accelerated graphics port) bus on the Uni-N IC. To give the graphics IC fast access to system memory, the AGP bus has separate address and data lines and supports deeply pipelined read and write operations. The AGP bus has 32 data lines and a clock speed of 66 MHz.
The graphics IC uses a graphics address remapping table (GART) to translate AGP logical addresses into physical addresses. The graphics driver software can allocate memory in both the dedicated SDRAM and the main memory.
For information about the display and supported resolutions, see Video Display.