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The architecture of the iBook computer is designed around the PowerPC G3 microprocessor and a new custom IC: the Pangea memory controller and the I/O device controller. The Pangea IC occupies the center of the block diagram.
Note
The Pangea IC combines the functions of the Uni-N and KeyLargo ICs used in earlier models.
The microprocessor is connected to the Pangea IC by a 60x bus with 64 data lines and a bus clock speed of 66 MHz. The Pangea IC has other buses that connect with the Boot ROM, the main system RAM, the graphics IC, and the Ethernet and FireWire PHY ICs. Each of the components listed here is described in one of the following sections. The buses implemented by the Pangea IC are summarized in Table 2-1, which is in the section Memory and I/O Device Controller.