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Accelerated Graphics Port Bus

The accelerated graphics port (AGP) bus is a 66-MHz, 32-bit bus connecting the AGP graphics card to the Uni-N IC. The AGP bus provides faster access to main memory than previous designs using the PCI bus. In addition, the bus is an AGP-4x bus with four times the performance of the original AGP bus.

The AGP bus is a superset of the PCI bus, with the addition of separate address lines so it does not multiplex address and data when running in AGP mode. Having a separate address bus allows the AGP bus to pipeline addresses, thereby improving performance.

To further improve the performance of the AGP bus, the Uni-N IC supports a graphics address remapping table (GART). Because the virtual memory system organizes main memory as randomly distributed 4 KB pages, DMA transactions for more than 4 KB of data must perform scatter-gather operations. To avoid this necessity for AGP transactions, the GART is used by the AGP bridge in the Uni-N to translate a linear address space for AGP transactions into physical addresses in main memory.


Copyright © 2001 Apple Computer, Inc. (Last Updated January 2, 2001)

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