Table 3-4 Signals on the ATA hard disk connector
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Signal name
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Signal description
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DA(0-2)
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Device address; used by the computer to select one of the registers in the ATA drive. For more information, see the descriptions of the CS0 and CS1 signals.
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DD(0-15)
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Data bus; buffered from IOD(16-31) of the computer's I/O bus. DD(0-15) are used to transfer 16-bit data to and from the drive buffer. DD(8-15) are used to transfer data to and from the internal registers of the drive, with DD(0-7) driven high when writing.
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/CS0
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Register select signal. It is asserted low to select the main task file registers. The task file registers indicate the command, the sector address, and the sector count.
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/CS1
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Register select signal. It is asserted low to select the additional control and status registers on the ATA drive.
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CSEL
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Cable select; not available on this computer (n.c.).
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/DASP
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Device active or slave present; not available on this computer (n.c.).
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IORDY
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I/O ready; when driven low by the drive, signals the CPU to insert wait states into the I/O read or write cycles.
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/IOCS16
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I/O channel select; not used on this computer (pulled low by a 1 kilohm resistor).
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/DIOR
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I/O data read strobe.
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/DIOW
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I/O data write strobe.
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/DMACK
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Used by the host to initiate a DMA transfer in response to DMARQ.
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DMARQ
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Asserted by the device when it is ready to transfer data to or from the host.
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INTRQ
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Interrupt request. This active high signal is used to inform the computer that a data transfer is requested or that a command has terminated.
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/PDIAG
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Asserted by device 1 to indicate to device 0 that it has completed the power-on diagnostics; not available on this computer (n.c.).
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/RESET
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Hardware reset to the drive; an active low signal.
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Key
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This pin is the key for the connector.
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