This chapter tells how to gain access to the expansion slots in the 15” iMac computer and describes the RAM expansion modules.
RAM Expansion Slots
RAM Expansion Modules for Pangea IC System
The 15” iMac has two RAM expansion slots off the PC100 bus. One of the slots accepts a standard, unbuffered PC133 168-pin DIMM (512 MB with minimum latency 3.0) and is occupied by the factory-installed RAM.The other slot accepts a standard PC133 144-pin SO-DIMM and is normally used for added RAM.
Note: Only the SO-DIMM slot is accessible by the user. (The access panel is on the bottom of the computer.)
Important: The user should be reminded to observe the usual precautions to avoid damage to the electronic components due to static electricity.
Warning: The computer must be turned off before RAM modules are removed or inserted. To remind the user, a red LED is visible in the access door. If the red LED is on, power is on, and must be turned off before changing RAM modules.
The 15” iMac computer uses two types of RAM expansion modules: one 168-pin DIMM and one 144-pin SO-DIMM. Both expansion modules for the iMac are 3.3 volt, unbuffered, 8-byte, non-parity, and PC133 compliant. The speed of the SDRAM devices must be rated at 125 MHz (8 ns) or faster.
A DIMM for the Pangea system can contain either 128, 256, or 512 MB of memory; an SO-DIMM can contain either 64,128, 256, or 512 MB of memory.
Important: RAM expansion DIMMs must be PC133 compliant and use SDRAM devices. If the user installs a DIMM that uses EDO or SGRAM devices, the computer will beep several times when the user attempts to restart the computer.
The sections that follow describe the 144-pin SO-DIMM for the user-accessible expansion slot. Because the 168-pin DIMM slot is not accessible to the user, its specifications are not given here.
The mechanical characteristics of the SO-DIMM are given in the JEDEC specification for the 144-pin 8-byte DRAM SO-DIMM. The specification number is JEDEC MO-190-C. To find out how to obtain the specification, see “RAM Expansion Modules for Pangea IC System.”
The specification defines SO-DIMMs with nominal heights of 1.0, 1.25, 1.5, or 2.0 inches. The iMac can accommodate standard SO-DIMMs with any height up to the maximum specified.
The JEDEC specification defines the maximum depth or thickness of an SO-DIMM as 3.8 mm. That specification is also a maximum: Modules that exceed the specified thickness can cause reliability problems.
The SO-DIMM is required to be PC133 compliant. For information about the PC133 SDRAM specification, see the references at “RAM Expansion Modules.”
The electrical characteristics of the RAM SO-DIMM are given in section 4.5.6 of the JEDEC Standard 21-C, release 7. To obtain a copy of the specification, see the references listed at “RAM Expansion Modules.”
The JEDEC and PC133 specifications define several attributes of the DIMM, including storage capacity and configuration, connector pin assignments, and electrical loading. The specifications support SO-DIMMs with either one or two banks of memory.
The JEDEC specification for the SO-DIMM defines a Serial Presence Detect (SPD) feature that contains the attributes of the module. SO-DIMMs for use in Macintosh computers are required to have the SPD feature. Information about the required values to be stored in the presence detect EEPROM is in section 4.1.2.5 and Figure 4.5.6–C (144 Pin SDRAM SO–DIMM, PD INFORMATION) of the JEDEC standard 21-C specification, release 7.
Capacitance of the data lines must be kept to a minimum. Individual DRAM devices should have a pin capacitance of not more than 5 pF on each data pin.
Table 6-1 shows information about the different sizes of DIMMs used in the iMac computer. The first three columns show the memory size, configuration, and number of banks in the DIMMs. The other three columns show the number, density, and configuration of the DDR SDRAM devices making up the memory modules.
The SDRAM devices used in the RAM expansion modules must be self-refresh type devices for operation from a 3.3-V power supply. The speed of the SDRAM devices must be 100 MHz or greater.
The devices are programmed to operate with a CAS latency of 3. At that CAS latency, the access time from the clock transition must be 6 ns or less. The burst length must be at least 4 and the minimum clock delay for back-to-back random column access cycles must be a latency of 1 clock cycle.
Table 6-2 shows information about the different sizes of SDRAM devices used in the SO-DIMM. The first two columns show the memory size and configuration of the SO-DIMMs. The next two columns show the number and configuration of the SDRAM devices making up the memory modules.
Signals A[0] – A[12] and BA[0] – BA[1] on each SO-DIMM make up a 15-bit multiplexed address bus that can support several different types of SDRAM devices. Table 6-3 lists the types of devices that can be used in the SO-DIMM slot by size, configuration, and sizes of row, column, and bank addresses.
Important: The SO-DIMM slot supports only the types of SDRAM devices specified in Table 6-3. Other types of devices should not be used.
© 2003 Apple Computer, Inc. All Rights Reserved. (Last updated: 2003-05-09)