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The PCI Specification requires a 16-bit minimum size I/O space. The first implementation of the PCI bus for Power Macintosh provides a 23-bit I/O space, although the Macintosh address allocation software tries to fit all I/O address space requests within the 16-bit minimum size. The interface to I/O space uses a memory-mapped section in each PCI host bridge's control space. The system determines which PCI host bridge and bridge area to use when accessing each specific card.
In the first PCI implementation for Power Macintosh computers, the bridge posts all PCI write transactions. If the target is in PCI memory space, the bridge writes data directly; otherwise, the bridge generates the necessary I/O, configuration, or special cycle to provide write access. The bridge acknowledges cycle completion even though the transaction may not have been completed at its destination. To check for final write completion, a driver may request a read transaction for the destination device. Verifying that the read transaction has finished will establish that the previous write cycle was flushed from the bridge, without the need to compare data.
Because PCI allocations in I/O space are highly fragmented, high-performance interfaces should try to use the PCI memory space instead of I/O space. The programming interface for I/O cycles is described in Fast I/O Space Cycle Generation.