This chapter describes the architecture of the 17-inch PowerBook G4. It includes information about the major components on the main logic board: the microprocessor, the other main ICs, and the buses that connect them to each other and to the I/O interfaces.
Block Diagram and Buses
Microprocessor and Caches
Intrepid Controller Functions and Buses
AirPort Extreme Interface
PC Card/CardBus Controller IC
PCI USB 2.0 Controller
This section is an overview of the major ICs and buses on the computer’s main logic board.
Figure 2-1 is a simplified block diagram of the main logic board. The diagram shows the input and output connectors, the main ICs, and the buses that connect them together.
The architecture of the 17-inch PowerBook G4 is designed around the PowerPC G4 microprocessor and the Intrepid IC, which contains the memory controller and I/O device controller.
The PowerPC G4 microprocessor is connected to the Intrepid IC by a MaxBus bus. The bus clock speed is 167 MHz. Other buses that connect with the Intrepid IC are summarized in Table 2-1, which is in the section “Intrepid Controller Functions and Buses.”
The Intrepid I/O controller has a 32-bit PCI bus with a bus clock speed of 33 MHz. That bus also connects to the Boot ROM, the CardBus controller, the USB 2.0 controller, and the wireless LAN module. The Intrepid IC has other buses that connect with the hard disk drive and the optical drive, the power controller IC, the sound IC, and the internal modem module.
Each of the components listed here is described in one of the following sections.
The microprocessor communicates with the rest of the system by way of a 64-bit MaxBus bus to the Intrepid IC. The microprocessor has a separate bus to its internal second-level cache.
The PowerPC G4 microprocessor used in the 17-inch PowerBook G4 has many powerful features, including an efficient pipelined system bus called MaxBus.
Features of the PowerPC G4 include
32-bit PowerPC implementation
superscalar PowerPC core
Velocity Engine (AltiVec technology): 128-bit-wide vector execution unit
dual 32 KB instruction and data caches
an on-chip level 2 (L2) cache consisting of 512 KB with a clock speed ratio of 1:1
high bandwidth MaxBus (also compatible with 60x bus)
fully symmetric multiprocessing capability
The PowerPC G4 microprocessor in the 17-inch PowerBook G4 runs at a clock speed of 1.5 GHz.
The data storage for the L2 cache consists of 512 KB of fast static RAM that is built into the microprocessor chip along with the cache controller and tag storage. The built-in L2 cache runs at the same clock speed as the microprocessor.
The Intrepid IC provides the functions of a memory controller and an I/O device controller in the 17-inch PowerBook G4.
In addition to the buses listed in Table 2-1, the Intrepid IC also has separate interfaces to the physical layer (PHY) ICs for Ethernet and FireWire, and an IIC (inter-IC control bus) interface that is used for configuring the memory subsystem.
The following sections describe the subsystems that are connected to the Intrepid IC.
The memory subsystem in the 17-inch PowerBook G4 supports two slots for 333 MHz DDR (PC2700) SO-DIMMs (small-outline dual inline memory modules). The data bus to the RAM and DIMM is 64 bits wide, and the memory interface is synchronized to the MaxBus bus interface at 167 MHz. See “RAM Expansion Slots.”
The boot ROM is connected to the Intrepid IC by way of the high byte of the PCI bus plus three additional control signals: chip select, write enable, and output enable. The boot ROM is a 1 M by 8 bit device.
The Intrepid IC FireWire controller supports IEEE 1394a for a maximum data rate of 400 Mbps (50 MBps) and IEEE 1394b for a maximum data rate of 800 Mbps (100 MBps). The Intrepid IC provides DMA (direct memory access) support for the FireWire interface.
The controller in the Intrepid IC implements the FireWire link layer. A physical layer IC, called a PHY, implements the electrical signaling protocol of the FireWire interface and provides the electrical signals to the port. For more information, see “FireWire 400 Connector” and “FireWire 800 Connector.”
The Intrepid IC includes an Ethernet media access controller (MAC) that implements the link layer. The Intrepid IC provides DB-DMA support for the Ethernet interface.
The Ethernet controller in the Intrepid IC is connected to a PHY interface IC that provides the electrical signals to the port. The PHY is capable of operating in either 10Base-T, 100Base-T, or 1000Base-T mode: The actual speed of the link is automatically negotiated by the PHY and the hub or switch to which it is connected. For more information, see “Ethernet Port.”
The PHY supports Auto-MDIX, which allows the use of straight-through cables in crossover situations (and conversely). For more information, see “Ethernet Port.”
The video display subsystem contains the graphics controller IC along with 64 MB of DDR SDRAM memory. The graphics IC, an ATI Mobility Radeon 9700 , contains 2D and 3D acceleration engines, front-end and back-end scalers, a CRT controller, and an AGP4x bus interface with bus master capability.
The features of the ATI Mobility Radeon 9700 include
graphics processor clock speed of 392 MHz
memory clock speed of 202 MHz
support for 64 MB of DDR video memory with 128-bit interface (with a build to order option of 128 MB memory)
2D and 3D graphics acceleration
transform acceleration
lighting acceleration
video acceleration
support for MPEG decoding
support for video mirror mode
support for dual-display mode
S-video output for a TV monitor
The interface between the graphics IC and the rest of the system is an AGP4x (accelerated graphics port, quadruple speed) bus on the Intrepid IC. The AGP bus has 32 data lines, a clock speed of 133 MHz, and supports deeply pipelined read and write operations.
The graphics IC uses a graphics address remapping table (GART) to translate AGP logical addresses into physical addresses. The graphics driver software can allocate memory in both the graphics SDRAM and the main memory.
The graphics IC supports the internal flat-panel display and an external monitor. The external monitor can either mirror the built-in display or show additional desktop space (dual-display mode). For information about the displays and supported resolutions, see “Flat-Panel Display” and “External Monitors.”
The Intrepid IC provides DB-DMA (descriptor-based direct memory access) support for the following I/O channels:
Ultra DMA ATA interface to the the internal hard drive
modem slot interface to the built-in modem
IIS channel to the sound IC
The DB-DMA system provides a scatter-gather process based on memory resident data structures that describe the data transfers. The DMA engine is enhanced to allow bursting of data files for improved performance.
The Intrepid IC has an interrupt controller (MPIC) that handles interrupts generated within the IC as well as external interrupts, such as those from the Ethernet and FireWire controllers.
The Intrepid IC has three independent USB 1.1 Open Host Controller Interface (OHCI) controllers. One is used for the modem module and the Bluetooth interface and the other two are not used.
The external USB interface is via the PCI USB controller; see “PCI USB 2.0 Controller.”
The Intrepid IC provides an Ultra DMA ATA-100 channel that is connected to the internal hard disk drive. The Intrepid IC provides DB-DMA (descriptor-based direct memory access) support for the ATA-100 interface.
The internal hard disk drive is connected as device 0 (master) in an ATA Device 0/1 configuration. For more information, see “Hard Disk Drive.”
The Intrepid IC provides a multiword DMA EIDE bus that supports the SuperDrive. The SuperDrive is an ATAPI drive and is device-selected as master in an ATA device configuration.
The internal modem is connected to an internal USB 1.1 port. The Intrepid IC provides DB-DMA support for the modem interface. The modem provides digital call progress signals to the sound circuitry.
The internal modem is a separate module that contains the data pump IC and the interface to the telephone line (DAA). For more information about the modem, see “Internal Modem.”
The sound circuitry is connected to the Intrepid IC by a standard IIS (inter-IC sound) bus. The Intrepid IC provides DB-DMA (descriptor-based direct memory access) support for the IIS port.
The audio circuitry includes a signal processing IC that handles the equalization and volume control functions, a codec IC that performs A-to-D and D-to-A conversion, and a power amplifier that drives the headphone jack.
All audio is handled digitally inside the computer. The audio circuitry performs digital-to-analog conversion for the audio signals to the internal speakers and the headphone jack.
For a description of the features of the sound system, see “Sound System.”
The power management controller in the 17-inch PowerBook G4 is a custom IC called the PMU99. It supports several power-saving modes of operation, including idle, doze, and sleep.
A device’s ID voltage limits determines how the PMU identifies the power adapter. The 17-inch PowerBook G4 is designed to use the 65-Watt Apple Portable Power Adapter which ships with it. Although you can use a 45-Watt Apple portable power adapter with a 17-inch PowerBook G4, it may not provide sufficient power during some activities and power may be drawn temporarily from the battery. Should the battery become discharged, you may need to plug in the 65-Watt Apple Portable Power Adapter that came with the computer in order to start it up.
The 17-inch PowerBook G4 has a variable speed fan control circuit and a thermal circuit that will force the unit into reduce-processor mode at 68 degrees Celsius and into sleep mode if the processor temperature exceeds 79 degrees Celsius.
The 17-inch PowerBook G4 can operate from a 15 volt power outlet on an airline, but for safety reasons, the computer will not allow battery charging. In order for the computer to detect the connection to airline power, the airline power cable should have a sense resistor of 24.3 K ohms +/-1% connected between the power plug's shell and ground.
AirPort Extreme contains a media access controller (MAC), a digital signal processor (DSP), and a radio-frequency (RF) section.
Two antennas are built into the computer’s case. A diversity module is controlled by the AirPort Extreme to allow selection of either antenna. To improve reception, the AirPort Extreme measures the signal integrity from each antenna from the initial header time of each received data packet and selects the antenna with the strongest signal to receive the balance of the packet.
AirPort Extreme is compliant with the IEEE 802.11g standard. The card transmits and receives data at up to 54 Mbps and is compatible with 802.11b-standard 11 Mbps systems and older 802.11b-standard systems. For information about its operation, see “AirPort Extreme.”
The interface to the PC Card slot is connected to the PCI bus. The CardBus controller IC is a PCI1510A device made by Texas Instruments. It supports both 16-bit PC Cards and 32-bit CardBus Cards.
The 17-inch PowerBook G4 CPU uses a PCI USB controller with one Enhanced Host Controller Interface (EHCI) function and two Open Host Controller Interface (OHCI) functions. The controller supports two external USB 2.0 ports.
The two external USB ports comply with the Universal Serial Bus Specification 2.0. The USB register set complies with the EHCI and OHCI specifications. For more information, see “USB 2.0 Ports.”
The two external USB 2.0 connectors support USB devices with data transfer rates of up to 480 Mbps. For more information about the connectors, see “USB Connectors.”
USB 2.0 devices connected to the 17-inch PowerBook G4 are required to support USB-suspend mode as defined in the USB specification. For additional reference information, see “USB Interface.”
The USB ports on the 17-inch PowerBook G4 comply with the Universal Serial Bus Specification 2.0. The USB controllers comply with the EHCI specification; the companion controllers comply with the OHCI specification. The internal USB 1.1 interface complies with the OHCI specification, see “USB Interface.”
© 2003, 2004 Apple Computer, Inc. All Rights Reserved. (Last updated: 2004-04-19)