Architecture of the 15” iMac
This chapter describes the architecture of the 15” iMac computer. It includes information about the major components on the main logic board: the microprocessor, the other main ICs, and the buses that connect them to each other and to the I/O interfaces.
In this section:
Block Diagrams and Buses
Microprocessor and Cache
Memory and I/O Device Controller
Block Diagrams and Buses
This section is an overview of the major ICs and buses on the computer’s main logic board. The 15” iMac uses the Pangea IC.
Block Diagrams
Figure 2-1 provides a simplified block diagram of the main IC and the buses that connect them together.
Main ICs and Buses
The architecture of iMac computer is designed around the PowerPC G4 microprocessor and the Pangea memory and I/O device controller. The IC occupies the center of the block diagrams.
The PowerPC G4 microprocessor is connected to the Pangea IC by a MaxBus bus with 64 data lines and a bus clock speed of 100 MHz. The Pangea IC has other buses that connect with the boot ROM, the hard disk drive, and the optical drive, the power controller IC, the sound IC, the internal modem module, and the optional wireless LAN module.
The Pangea I/O controller has a 32-bit PCI bus with a bus clock speed of 33 MHz. That bus also connects to the Boot ROM and the CardBus controller.
Each of the components listed here is described in one of the following sections.
Microprocessor and Cache
The microprocessor runs at a clock speed 800 MHz. The microprocessor is a PowerPC G4 with a built-in 256 MB level 2 (L2) cache.
PowerPC G4 Microprocessor
The PowerPC G4 microprocessor has many powerful features, including a pipelined system bus, called MaxBus, that is more efficient than the system bus on the PowerPC G3 microprocessors.
The PowerPC G4 used in the iMac computer has the following features:
32-bit PowerPC implementation
superscalar PowerPC core
Velocity Engine (AltiVec technology): 128-bit-wide vector execution unit
high bandwidth MaxBus
dual 32 KB instruction and data caches (level one)
on-chip second level (L2) cache consisting of 256 KB with a clock speed ratio of 1:1
To find more information, see the reference at “PowerPC G4 Microprocessor.”
Level 2 Cache
The data storage for the L2 cache consists of 256 KB of fast static RAM that is built into the microprocessor chip along with the cache controller. The built-in L2 cache runs at the same clock speed as the microprocessor cache.
Memory and I/O Device Controller
The Pangea IC combines several functions into a single IC. The IC contains the memory controller, the PCI bus bridge, the Ethernet and FireWire 400 interfaces, the USB interface, and the AGP interface.
In addition to the buses listed in Table 2-1, the Pangea IC also has separate interfaces to the physical layer (PHY) ICs for Ethernet and FireWire and an I2C interface that is used for configuring the memory subsystem.
The Pangea IC provides DB-DMA (descriptor-based direct memory access) support for the I/O channels. The DBDMA system provides a scatter-gather process based on memory resident data structures that describe the data transfers. The DMA engine is enhanced to allow bursting of data files for improved performance.
The Pangea IC has an interrupt controller (Open-PIC) that handles interrupts generated within the IC as well as external interrupts, such as those from the Ethernet and FireWire 400 controllers.
The following sections describe the subsystems that are connected to the Pangea IC.
System RAM
The memory subsystem in the Pangea system supports two slots: one for a 168-pin DIMMs (dual inline memory module) and one for a 144-pin SO-DIMM. The data bus to the RAM and DIMM is 64 bits wide, and the memory interface is synchronized to the MaxBus interface at 100 MHz.
For more information on system RAM, see “RAM Expansion Slots.”
Note: Only the SO-DIMM slot is accessible by the user. See “RAM Expansion Slots.”
Boot ROM
The boot ROM is a 1 M by 8 bit device connected to the Pangea IC by way of a CardBus interface.
FireWire 400 Controller
The Pangea IC includes an IEEE 1394a FireWire 400 controller with a data rate of 400 Mbits (50 MBps) and provides DMA (direct memory access) support for the FireWire 400 interface.
The controller IC implements the FireWire 400 link layer. A physical layer IC, called a PHY, implements the electrical signalling protocol of the FireWire 400 interface. The PHY supports two FireWire 400 ports by way of external connectors on the back of the enclosure.
Important: The FireWire PHY on the iMac does not operate with external bus power. As long as the computer is plugged into an active AC power outlet, the FireWire PHY is active and the FireWire bus remains connected. If AC power is interrupted, the PHY will not operate.
Ethernet Controller
The Pangea IC includes an ethernet media access controller (MAC) that implements the Link layer. As a separate channel connected directly to the IC logic, it can operate at its full capacity without degrading the performance of other peripheral devices. The Pangea IC provides DB-DMA support for the Ethernet interface.
The controller is connected to a PHY interface IC that is capable of operating in either 10-BaseT or 100-BaseTX mode. The actual speed of the link is automatically negotiated by the PHY and the bridge or router to which it is connected. For more information, see “Ethernet Port.”
Pangea IC Video Display Subsystem
The display subsystem for the Pangea IC system consists of a graphics controller ASIC and 32 MB of DDR RAM on the main logic board. The graphics controller IC is an NVIDIA GeForce2 MX. It contains 2D and 3D acceleration engines, front-end and back-end scalers, a display controller, and an AGP 2x bus interface with bus master capability.
The graphics IC supports a display size of 1024 by 768 pixels. The graphics IC also has a scaling mode that displays a 640-by-480 or 800-by-600 pixel image on the full screen.
The display generated for the flat panel display is simultaneously available for an external monitor. See “Video Monitor Port.”
The interface between the graphics IC and the rest of the system is an AGP (accelerated graphics port) 2x bus on the Pangea IC. To give the graphics IC fast access to system memory, the AGP bus has separate address and data lines and supports deeply pipelined read and write operations. The AGP bus has 32 data lines and a clock speed of 66 MHz.
The graphics IC uses a graphics address remapping table (GART) to translate AGP logical addresses into physical addresses. The graphics driver software can allocate memory in both the dedicated DDR RAM and the main memory.
For information about the display and supported resolutions, see “Flat Panel Display” and “Video Monitor Port.”
USB Interface
The Pangea IC implements two independent USB controllers (root hubs), each with two ports. The internal modem and the external USB port nearest the mini-VGA connector are connected to one controller; the other two USB ports are connected to the other controller.
Each USB controller provides a 12 Mbps data transfer rate that is shared between the two devices connected to it. The two USB ports that are connected to separate controllers can support high data rate devices at the same time with no degradation of their performance. Thus, if a user connects a high-speed (12 Mbps) device to USB port 1 and another high-speed device to the port 2, both devices can operate at their full data rates.
All three external USB connectors support USB devices with data transfer rates of 1.5 Mbps or 12 Mbps. For more information about the connectors, see “USB Ports.”
USB devices connected to the iMac are required to support USB-suspend mode as defined in the USB specification. Information about the operation of USB-suspend mode on Macintosh computers is included in the Mac OS USB DDK API Reference. To obtain that document, please see the references at “USB Interface.”
The USB ports on the iMac comply with the Universal Serial Bus Specification 1.1 Final Draft Revision. The USB controllers comply with the Open Host Controller Interface (OHCI) specification.
Ultra ATA-66 Interface
The Pangea IC provides an Ultra ATA-66 channel with one connector to the internal hard disk drive and the optical drive. The Pangea IC provides DB-DMA (descriptor-based direct memory access) support for the Ultra DMA interface.
The internal hard disk drive is connected as device 0 (master) in an ATA Device 0/1 configuration; the optical drive is connected as device 1 (slave). The Ultra ATA-66 conforms to a subset of ATA/ATAPI-6 and -5 protocols. For more information, see “Hard Disk Drive.”
Modem Support
One of the USB ports on the Pangea IC is used for the interface to the modem. The Pangea IC provide DB-DMA support for the modem interface. The modem provides digital call progress signals to the audio codec sound circuits.
The internal hardware modem is a separate module that contains the datapump and the interface to the telephone line (DAA). For more information about the modem, see “Internal Modem.”
Sound Circuitry
The audio codec circuitry exchanges audio data with the main IC over a standard I2S bus and receives commands from the main IC over an I2C bus. The main IC provides DB-DMA (descriptor-based direct memory access) support for the I2S bus.
The sound circuitry includes a signal processing IC for equalization and volume control functions and a codec IC for A/D and D/A conversion.
The sound circuitry performs analog-to-digital conversion for the internal microphone and digital-to-analog conversion for the audio signals it sends to the internal speaker and the headphone jack. A switch-mode power amplifier drives the internal speaker and the Apple Pro Speaker minijack.
For a description of the features of the sound system, see “Sound System.”
Power Controller
The power management controller in the iMac is a custom IC called the PMU99. It supports several power-saving modes of operation, including idle, doze, and sleep.
AirPort Wireless Support (optional)
Apple’s internal wireless LAN module, the 11 Mbps AirPort Card, is available as a build-to-order option. The connector for the AirPort Card uses the CardBus interface. A separate connector is used for the cable to the antennas, which are built into the computer’s enclosure. For information about operation, see “AirPort Card.”
© 2003 Apple Computer, Inc. All Rights Reserved. (Last updated: 2003-05-09)