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Figure A-2 shows what happens when the diagram in Figure A-1 is rotated counterclockwise.
In Figure A-2 and Figure A-3, the organization of memory is shown with the more significant bytes to the left and the less significant bytes to the right. This is consistent with standard numerical notation and most computer system documentation. Likewise, all bit-field and byte-field designations reference the most significant bit or byte number of the field first.
Figure A-2 Big-endian descriptor layout
The diagram in Figure A-2 shows how a big-endian processor or memory system would organize the sample descriptor. In a big-endian system, physical memory is organized with the address of each byte increasing from most significant to least significant.
Endian order makes no difference for single-byte values. However, with multibyte values, the endian order determines the order in which bytes are addressed. As noted above, multibyte fields are interpreted with more significant bytes to the left and less significant bytes to the right. This means that the address of the most significant byte of the address field A is 4, while byte 7 corresponds to the least significant byte of A.
Bit ordering in a strictly big-endian architecture should naturally follow the ordering of bytes; that is, the most significant bit should be bit 0. This is true of PowerPC addressing. All bit numbering in this appendix follows the byte order, so the first bit designated in big-endian addressing (the most significant bit) has the lowest bit number.